Optimizing PLC Scan Time: Practical Techniques

The cycle time (scan time) is how long the CPU needs to execute the complete user program once. Typical industrial PLCs run between 1 and 100 ms. When cycle time is too long, the PLC misses fast signals, response times increase, and in the worst case the CPU triggers a time error (OB 80) or goes to STOP. This guide covers practical techniques to reduce cycle time.

Understanding What Affects Cycle Time#

The cycle time consists of:

1. Process image update (reading inputs, writing outputs) — typically 1–5 ms depending on I/O count
2. User program execution — the main variable, depends on code size and complexity
3. Communication processing — HMI, PROFINET, OPC UA — can consume significant time
4. System tasks — diagnostics, internal housekeeping

You can only directly optimize #2 (and indirectly influence #3).

Technique 1: Conditional Execution (Biggest Impact)#

Not all code needs to run every cycle. Code that only runs when specific conditions are met can be skipped entirely:

AWL:

U  M 100.0          // Production mode active?
SPBN =SKIP_PROD     // If not → skip entire production block
SPA PB 10           // Call production program
SKIP_PROD: NOP 0

SCL:

IF #Production_Mode THEN
    "Production_Program"();
END_IF;

Impact: Skipping unused code sections reduces average scan time by 20–40% in programs with multiple operating modes (manual, automatic, setup, cleaning).

Technique 2: Use Optimized Data Blocks (S7-1500)#

On S7-1500, optimized data blocks (the default) provide significantly faster access than standard data blocks:

• Optimized access: CPU accesses data by symbolic reference → the compiler generates efficient machine code
• Standard access: CPU calculates byte addresses at runtime → slower

Typical improvement: 10–30% faster DB access on S7-1500 with optimized blocks.

How to verify: Check DB properties → Attributes → "Optimized block access" checkbox should be enabled. If your migrated program uses absolute DB addressing (DBW0, DBD4), you must convert to symbolic access first.

Technique 3: Choose the Right Programming Language#

SCL and KOP/FUP are compiled natively on S7-1500. AWL runs in emulation mode with overhead.

Practical impact: Converting AWL blocks to SCL can reduce their execution time by 10–30% on S7-1500.

Technique 4: Move Time-Critical Code to Cyclic Interrupts#

Instead of making OB1 faster, move time-critical code to a cyclic interrupt OB (OB30–OB38):

• OB1 runs the main program at whatever cycle time results (e.g., 20 ms)
• OB35 runs time-critical code at a fixed 100 ms interval (configurable down to 1 ms)
• The interrupt OB preempts OB1 — guaranteed execution timing

Typical use: PID control loops, high-speed counting, motion control, safety-relevant timing.

Technique 5: Reduce Communication Load#

Communication with HMI, SCADA, and other PLCs consumes cycle time:

• Reduce HMI polling frequency: 500 ms update rate for display values instead of 100 ms
• Use optimized communication: On S7-1500, OPC UA and PUT/GET consume less cycle time than proprietary methods when configured correctly
• Batch data transfers: Transfer one array instead of 50 individual variables

Technique 6: Avoid Unnecessary Operations#

How to Measure Cycle Time#

In STEP 7 Classic: CPU diagnostics → Cycle time (shows min/max/current)

In TIA Portal: Online & Diagnostics → Cycle time → Shows minimum, maximum, and current cycle time

In the program: Read system clock with SFC 64 "TIME_TCK" at the start and end of OB1. Difference = user program execution time.

Warning thresholds:

• < 10 ms: Excellent for most applications
• 10–50 ms: Normal for medium-sized programs
• 50–100 ms: Acceptable for slow processes, watch for signal loss

• 100 ms: Problematic — fast signals may be missed, investigate optimization

Frequently Asked Questions#

What cycle time does my application need?

Rule of thumb: The cycle time should be less than half the shortest signal duration you need to detect. If your fastest sensor produces 50 ms pulses, your cycle time should be under 25 ms. For safety-critical applications, follow the specific SIL/PL requirements.

Can I set a fixed cycle time?

Yes. In TIA Portal: CPU properties → Cycle → Minimum cycle time. The CPU waits until the minimum time before starting the next cycle. This creates deterministic behavior but does not help if the actual execution time already exceeds the target.

Maintained by PLCcheck.ai. Last update: March 2026. Not affiliated with Siemens AG.